This invention relates to an information processing system operable under the control of a microprogram and, in particular, to a microprogram-controlled device for carrying out sequence control for the microprogram.
As well known in the art, a microprogram-controlled device is operable under the control of a microprogram. A known microprogram-controlled device comprises a control storage device for memorizing a plurality of microinstructions which compose the microprogram. Each of the microinstructions includes a next microinstruction address for next microinstruction to be executed following a current microinstruction which is currently executed. Read from the control storage device, the next microinstruction includes the next microinstruction address which is modified into a modified microinstruction address on the basis of a branch condition signal and then the modified microinstruction address is directly held in a next microinstruction address register as a held microinstruction address. The next microinstruction address register supplies the control storage device with the held microinstruction address as the next microinstruction address to make the control storage device produce the next microinstruction. Such an address method for the microprogram-controlled device is called a next address method. This is because each microinstruction includes a next microinstruction address.
In order to make the microprogram-controlled device operate at a high speed, the control storage device has been operated in a state where the control storage device is accessed at an access time which is nearly equal to a cycle time of which the microprogram-controlled device has an operation clock. Under the circumstances, a microinstruction register temporarily holds the next microinstruction read from the control storage device to compensate a delay of an access speed for the control storage device and each microinstruction includes a plurality of every second microinstruction addresses for microinstructions to be executed two steps after the current microinstruction. The every second microinstruction address is a next microinstruction address but one. Such an address method for the microprogram-controlled device is referred to an every second address method.
In a conventional microprogram-controlled device adopting the every second address method, each microinstruction includes the every second microinstruction addresses which are equal in number to the maximum number of available branches for the microprogram. As a result, degradation of performance due to the branches can be prevented by using the every second microinstruction address corresponding to each branch.
As described above, in the conventional microprogram-controlled device adopting the every second address method, it is necessary for each microinstruction to include the every second microinstruction addresses which are equal in number to the maximum number of available branches for the microprogram. Therefore, each microinstruction has a longer bit length. Accordingly, the conventional microprogram-controlled device adopting the every second address method is defective in that the control storage device has a large storage capacity.